Réunion
Méthodes et Outils de Développement pour des Applications de Traitement du Signal et d'Apprentissage
Axes scientifiques :
- Adéquation algorithme-architecture, traitements embarqués
Organisateurs :
Nous vous rappelons que, afin de garantir l'accès de tous les inscrits aux salles de réunion, l'inscription aux réunions est gratuite mais obligatoire.
Inscriptions
0 personnes membres du GdR IASIS, et 0 personnes non membres du GdR, sont inscrits à cette réunion.
Capacité de la salle : 100 personnes. 100 Places restantes
Inscriptions closes pour cette journée
Annonce
Abstract
The capabilities of computing platforms, be they embedded or in the cloud, continues to rise despite the often-prophesied end of Moore’s law. Unfortunately, to fully benefit from the computational power offered by these platforms, tedious implementation work is often needed from the developer. This implementation task also requires a development expertise on the targeted platform, which may be an uncommon skill in many research domains where computers are used as a tool, with only limited knowledge of their inner mechanisms. As such, harnessing the complexity of modern computing platform can be a major roadblock to the development of new research ideas in compute-intensive domains, such as computer vision and stream processing applications.
The main purpose of computer-aided design tools and methodologies is to ease the life of developers. To this purpose, methods and tools adopt diverse strategies, such as rising the level of abstraction of the application specification to hide low-level implementation details from the developer. Another common service provided by these tools is the automation of part of the design-space exploration, which can be done at design-time, but also as a runtime optimization service for suitable applications and architectures.
The objective of the thematic day is to host presentations of tools and design methodologies for easing the development of Signal Processing and Machine Learning applications from diverse domains, and targeting diverse computing platforms.
Programme
- 9:00 - Welcome e-coffee
- 9:05 - Eduardo de la Torre (Universidad Politecnica de Madrid). Harnessing Reconfigurable Computing Architecture with ARTICo³
- 9:45 - Q&A + Stretch your legs and ears break.
- 10:00 - Jocelyn Sérot (Institut Pascal) High-Level Dataflow Description Langage for HW and SW design with HoCL
- 10:40 - Q&A + Refill your coffee and empty your bladder break.
- 10:55 - Denis Barthou (Inria Storm / LaBRI). Tools for High-Performance Computing: StarPU, AFF3CT, MIPP
- 11:35 - Q&A + Farewell & e-goodbyes !
